60 research outputs found
Towards Scaling Blockchain Systems via Sharding
Existing blockchain systems scale poorly because of their distributed
consensus protocols. Current attempts at improving blockchain scalability are
limited to cryptocurrency. Scaling blockchain systems under general workloads
(i.e., non-cryptocurrency applications) remains an open question. In this work,
we take a principled approach to apply sharding, which is a well-studied and
proven technique to scale out databases, to blockchain systems in order to
improve their transaction throughput at scale. This is challenging, however,
due to the fundamental difference in failure models between databases and
blockchain. To achieve our goal, we first enhance the performance of Byzantine
consensus protocols, by doing so we improve individual shards' throughput.
Next, we design an efficient shard formation protocol that leverages a trusted
random beacon to securely assign nodes into shards. We rely on trusted
hardware, namely Intel SGX, to achieve high performance for both consensus and
shard formation protocol. Third, we design a general distributed transaction
protocol that ensures safety and liveness even when transaction coordinators
are malicious. Finally, we conduct an extensive evaluation of our design both
on a local cluster and on Google Cloud Platform. The results show that our
consensus and shard formation protocols outperform state-of-the-art solutions
at scale. More importantly, our sharded blockchain reaches a high throughput
that can handle Visa-level workloads, and is the largest ever reported in a
realistic environment.Comment: This is an updated version of the Chain of Trust: Can Trusted
Hardware Help Scaling Blockchains? paper. This version is to be appeared in
SIGMOD 201
SMoTherSpectre: exploiting speculative execution through port contention
Spectre, Meltdown, and related attacks have demonstrated that kernels,
hypervisors, trusted execution environments, and browsers are prone to
information disclosure through micro-architectural weaknesses. However, it
remains unclear as to what extent other applications, in particular those that
do not load attacker-provided code, may be impacted. It also remains unclear as
to what extent these attacks are reliant on cache-based side channels.
We introduce SMoTherSpectre, a speculative code-reuse attack that leverages
port-contention in simultaneously multi-threaded processors (SMoTher) as a side
channel to leak information from a victim process. SMoTher is a fine-grained
side channel that detects contention based on a single victim instruction. To
discover real-world gadgets, we describe a methodology and build a tool that
locates SMoTher-gadgets in popular libraries. In an evaluation on glibc, we
found hundreds of gadgets that can be used to leak information. Finally, we
demonstrate proof-of-concept attacks against the OpenSSH server, creating
oracles for determining four host key bits, and against an application
performing encryption using the OpenSSL library, creating an oracle which can
differentiate a bit of the plaintext through gadgets in libcrypto and glibc
Time Protection: the Missing OS Abstraction
Timing channels enable data leakage that threatens the security of computer
systems, from cloud platforms to smartphones and browsers executing untrusted
third-party code. Preventing unauthorised information flow is a core duty of
the operating system, however, present OSes are unable to prevent timing
channels. We argue that OSes must provide time protection in addition to the
established memory protection. We examine the requirements of time protection,
present a design and its implementation in the seL4 microkernel, and evaluate
its efficacy as well as performance overhead on Arm and x86 processors
A Systematic Evaluation of Transient Execution Attacks and Defenses
Research on transient execution attacks including Spectre and Meltdown showed
that exception or branch misprediction events might leave secret-dependent
traces in the CPU's microarchitectural state. This observation led to a
proliferation of new Spectre and Meltdown attack variants and even more ad-hoc
defenses (e.g., microcode and software patches). Both the industry and academia
are now focusing on finding effective defenses for known issues. However, we
only have limited insight on residual attack surface and the completeness of
the proposed defenses.
In this paper, we present a systematization of transient execution attacks.
Our systematization uncovers 6 (new) transient execution attacks that have been
overlooked and not been investigated so far: 2 new exploitable Meltdown
effects: Meltdown-PK (Protection Key Bypass) on Intel, and Meltdown-BND (Bounds
Check Bypass) on Intel and AMD; and 4 new Spectre mistraining strategies. We
evaluate the attacks in our classification tree through proof-of-concept
implementations on 3 major CPU vendors (Intel, AMD, ARM). Our systematization
yields a more complete picture of the attack surface and allows for a more
systematic evaluation of defenses. Through this systematic evaluation, we
discover that most defenses, including deployed ones, cannot fully mitigate all
attack variants
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